1. Field of the Invention
The present invention relates to a semiconductor device including a plurality of unit elements, an electronic apparatus including the semiconductor device, and a controlling method and a signal processing method relating to the semiconductor device or the electronic apparatus.
More specifically, the present invention relates to a semiconductor device (e.g., a solid-state imaging device) for detecting distribution of a physical quantity by reading electric signals representing the distribution of the physical quantity obtained by a matrix of unit elements (e.g., unit pixels) that are sensitive to electromagnetic waves input from the outside, such as light or radiation, a method of controlling gains for signals in the semiconductor device, and signal processing techniques for output signals amplified by the controlled gains.
2. Description of the Related Art
Semiconductor devices for detecting distributions of physical quantities, including lines or a matrix of unit elements (e.g., pixels) that are sensitive to electromagnetic waves input from the outside, such as light or radiation, are used in various fields. For example, in the field of video apparatuses, solid-state imaging devices for detecting light as a physical quantity, implemented by charge coupled devices (CCDs) or complementary metal-oxide semiconductor (CMOS) devices, are used. These devices read electric signals representing a distribution of a physical quantity obtained by unit elements (pixels in the case of a solid-state imaging device).
In a type of solid-state imaging device called amplifying solid-state imaging device, pixels implemented by active pixel sensors or gain cells including amplifying transistors in pixel-signal generators for generating pixel signals corresponding to signal charges generated by charge generators are provided. For example, CMOS solid-state imaging devices are often of this type. In an amplifying solid-state imaging device, in order to read image signals to the outside, address control is exercised on a pixel unit including a plurality of unit pixels so that signals from the individual pixels can be selected and read as desired. That is, an amplifying solid-sate imaging device is an example of an address-controlled solid-state imaging device.
For example, in an amplifying solid-state imaging device that is a type of X-Y addressed solid-state imaging device including a matrix of unit pixels, active elements such as MOS transistors are used so that pixels themselves are capable of amplification. That is, signal charges (photoelectrons) accumulated in photodiodes that function as photoelectric converters are amplified by the active elements to read image information.
In the X-Y addressed solid-state imaging device of this type, for example, a pixel unit includes a two-dimensional matrix of a large number of pixel transistors, accumulation of signal charges corresponding to incident light is started individually for each row or each pixel, and current or voltage signals based on the accumulated signal charges are sequentially read from the pixels based on addressing.
When signals are read from the pixel unit and output to the outside of the chip, reading circuits (column processors) are provided individually for the respective columns, signals are read sequentially from the pixels on a row-by-row basis and temporarily stored in the column processors, and pixel signals for one row are sequentially output to the outside of the chip at specific timing. This is called a column-based arrangement.
FIG. 27 shows an example construction of a column-based CMOS image sensor according to a related art, which is an example of X-Y addressed solid-state imaging device.
The CMOS image sensor includes an imaging unit (photoelectric converter region) 110, a timing-signal generator 40, a horizontal scanner 42H, a vertical scanner 42V, a column region unit 920, an output amp 950, a variable-gain amplifier 960, and an analog-to-digital (A/D) converter 970, provided on a semiconductor substrate (not shown).
Vertical signal lines 158 of the imaging unit 110 receive constant bias voltage applied by a load controller 174 via load MOS transistors 171.
In the column region unit 920 on the output side of the imaging unit 110, column processors 930 are provided for the respective columns of pixels. The column processors 930 have capacitors 932 on the vertical signal lines 158. The column processors 930 sequentially store pixel signals Vsig read from the respective pixels, and sequentially read the pixel signals Vsig out to the output amp 950.
In the arrangement described above, processing circuits (i.e., the column circuits 930) are provided individually for the respective columns, which is referred to as a column-based arrangement. That is, pixel signals are processed after reading the pixel signals on a column-by-column basis. Thus, compared with a case where signal processing is carried out in each unit pixel, the construction of each pixel is simplified, so that the number of pixels in an image sensor can be increased, the size of an image sensor can be reduced, or the cost of an image sensor can be reduced.
Next, the operation of the circuit of the column-based arrangement will be described briefly. The imaging unit 110 for receiving optical signals includes a plurality of unit pixels (P) 103 arranged in rows and columns. Each of the unit pixels 103 includes at least one charge generator (photoelectric converter), which is usually implemented by a photodiode or a photogate. Pixel signals output from the imaging unit 110 are read from rows selected by the vertical scanner 42H via vertical-scanning control lines 115.
Although only one vertical-scanning control line for each row of pixels is shown in FIG. 27, usually, a plurality of types of vertical-scanning control lines 115 is provided in parallel from the vertical scanner 42V in order to select each row of pixels and to read pixel signals.
Signals of a row selected via a vertical-scanning control line 115 are sequentially accumulated in the capacitors 932 of the column processors 930 provided in parallel on the output side of the imaging unit 110. The signals are accumulated simultaneously for the entire row.
The pixel signals Vsig accumulated in the capacitors 932 of the column processors 930 are sequentially selected by an operation of scanning columns sequentially from the left according to horizontal-select pulses CH(i) from the horizontal scanner 42H. That is, column-select switches 934, usually implemented by transistors, are sequentially selected and driven by the horizontal scanner 42H. Thus, pixel signals Vsig of the respective unit pixels 103 are sequentially read out to the output amp 950.
The output amp 950 sequentially amplifies the pixel signals Vsig read through a horizontal signal line 118 and outputs the amplified signals as voltage signals. The variable-gain amplifier 960 amplifies the voltages at one of gains having a small step size. The amplified pixel signals are input to the A/D converter 970 and are converted into digital signals.
Usually, the imaging unit 110, the column region unit 920, and the output amp 950 are formed on the same semiconductor chip to form a solid-state imaging device 10, and the variable-gain amplifier 960 and the A/D converter 970 are provided outside the chip, whereby a solid-state imaging unit 2 is formed. Alternatively, the variable-gain amplifier 960 and the A/D converter 970 are also formed on the semiconductor chip together with the imaging unit 110 and the like, in which case the solid-state imaging device 10 substantially coincides with the solid-state imaging unit 2.
In the arrangement described above, various amps are provided in the circuitry, such as amps used I the output amp 950 and the variable-gain amplifier 960. Since these amps are analog amps, thermal noise, which is analog random noise, could occur. The thermal noise could occur randomly with respect to time. An increased bandwidth is needed in the proximity of the output amp 950, and thermal noise that could be generated by amps tends to increase as the bandwidth increases. This is disadvantageous considering the trend of increased number of pixels and increased speed of imaging.
The bit precision of the A/D converter 970 provided in the solid-state imaging device currently available is usually 12 bits or 14 bits. When the bit precision of the A/D converter 970 is increased, power consumption is increased, and noise caused by the circuitry itself prohibits improvement in bit precision.
Thus, in a column-based image sensor according to the related art, it has been difficult to improve bit precision, and to extend dynamic range while maintaining favorable S/N ratio.
When gains of pixels signals are controlled on a pixel-by-pixel basis in the respective pixels of the imaging unit 110, bit precision is improved in the photoelectric converter region, so that the dynamic range of output signals can be extended. In that case, however, the construction of each of the pixels becomes complex, so that the advantages of reduced cost and reduced size due to the column-based arrangement are lost.
As an approach for overcoming these problems, for example, ISSCC 2003 2/11, Digest of Technical Paper, pp. 224-225, and IEEE J. Solid-State Circuits, Vol. 35, No. 7, pp. 932-938, July 2000, M. Schanz, propose techniques for reducing noise by using programmable gain control (PGA) circuits for adaptively amplifying, on a column-by-column basis, pixel signals read from a pixel unit in a CMOS image sensor. According to the techniques, the dynamic range of signals is extended while maintaining favorable S/N ratio so that image quality of the CMOS image sensor is improved, particularly when the luminance is low.
According to the techniques, on a line separate from the PGA circuits, pixel signals output from the imaging unit 110 are compared with predetermined threshold values, gains to be set to the PGA circuits are determined based on the results of comparison, and the PGA circuits are caused to operate with the gains determined, whereby gain control is exercised.
In exercising the gain control, when it is determined that signal levels are low and gains must be increased, the PGA circuits amplify pixel signals obtained by the imaging unit 110 by increased gains, outputting amplified signals to the outside. On the other hand, when it is determined that the signal levels are high and gains need not be increased, pixel signals obtained by the imaging unit 110 are output to the outside without being amplified by the PGA circuits.
The documents, however, only disclose basis techniques for providing PGA circuits for adaptively amplifying pixel signals for the respective columns, and further improvement is needed.
Furthermore, according to the techniques disclosed in the documents, depending on the constructions of the PGA circuits or circuits provided at subsequent stages thereof, in some cases, signal levels amplified by adjusted gains exceed the dynamic range of the circuitry, failing to appropriately extend the dynamic range of signals.